Prototype ‘3D’ chip from MIT could eliminate memory bottlenecks

Future CPUs will have to deal with growing amounts of data, but all too often they are slowed down by bandwidth issues between the processor and RAM. A prototype chip built by researchers at Stanford and MIT can solve the problem by sandwiching the m…

http://ift.tt/2ssw5DQ (Source)

Advertisements

Leave a Reply

Fill in your details below or click an icon to log in:

WordPress.com Logo

You are commenting using your WordPress.com account. Log Out / Change )

Twitter picture

You are commenting using your Twitter account. Log Out / Change )

Facebook photo

You are commenting using your Facebook account. Log Out / Change )

Google+ photo

You are commenting using your Google+ account. Log Out / Change )

Connecting to %s